Work with AMD's architecture specialists to improve future products Apply a data minded approach to target optimization efforts Stay informed of software and hardware trends and innovations, especially pertaining to algorithms and architecture Design and develop new groundbreaking AMD technologies Participating in new ASIC and hardware bring ups Debugging/fix existing iss

Conduct full review of existing HPC EDA infrastructure with grid, OS, and EDA tools teams as well as engineering technical leaders and re architect the future global hybrid on prem and multi cloud HPC infrastructure that is highly efficient, utilized, scalable, and cost effective. Propose innovative approaches and work collaboratively with peer teams to maximize grid perf

Collaborate with AMD and VMware architects, Field Engineers, Partners and Customers to identify areas of integrations/enhancements/performance between AMD EPYC and VMware products. Work with stakeholders across companies to implement identified improvements end to end. Drive creation and publication of validated AMD EPYC based solutions on VMware product stack to drive cu

Collaborate with architects, hardware engineers, and firmware engineers to understand the new features to be verified Build test plan documentation, accounting for interactions with other features, the hardware, the firmware, and the software driver use cases Build the directed and random verification tests Debug test failures to determine the root cause; work with RTL an

Memory Sub system Validation Engineer's responsibility includes all aspects of pre and post silicon validation from planning, execution and debug. Develop and execute test plans for HBM Functional and Electrical Validation (PVT Shmoo Characterization). The sought after candidate possess extensive knowledge of high bandwidth memory subsystem, including SoC memory architect

Lead cross functional team to address identified quality gaps on server. Make sure lessons learned on previous programs and carried forward and institutionalized for next programs. Enable better testing recipes to support debug team and customer requirements. Develop strategic plans with technical leads for achieving no undetected failures in a part's lifetime. This inclu

Drafting and negotiating agreements with customers for platform development, product marketing, product sales and support, and other related activities. Drafting and negotiating inbound and outbound technology license agreements and engineering services agreements in support of product development. Drafting and negotiating inbound and outbound software licensing agreement

Assist with and monitor case initiations and extensions of US non immigrant and immigrant visas (H 1B, L 1A/B, O 1, TN, E 3, F 1, PERM [EB 1A/B/C], I 140, AOS etc.). Act as a liaison with employees, managers, directors, human resources, global mobility, and talent acquisition to process visa transfers, extensions, change of status requests, and US permanent residency (gre

Analyze power consumption of new and existing micro architectural features of Next Generation High Performance CPU Cores. Analyze power characteristics of the latest Server/Client CPU workloads and use the data to influence microarchitecture decisions. Collaborate with the RTL team to improve the implementation. Asist them in interpreting power analysis results from tools

Define and implement Micro Architecture of Next Generation High Performance Processor Cores Collaborate with the Physical Design Team to achieve high frequency and low power while utilizing the latest cutting edge fabrication technologies Work with a team of Hardware and Software Engineers to advance the Instruction Set Architecture Collaborate with the Design Verificatio

Scan/ATPG Applicant should be familiar with scan hardware compressions, failure mechanisms and debug processes AC scan (at speed) development, debug, test and characterization Array Applicant should be familiar with modern SRAM cell operation. SRAM debug, characterization, test or design knowledge Memory BIST engine knowledge Analog/Mixed Signal Applicant should be famili

GPU Kernel Optimization Develop and optimize low level GPU kernels to accelerate inference and training of large machine learning models. Maximize the computational efficiency and reduce execution time while ensuring model accuracy. Multi GPU and Multi Node Optimization Design and implement strategies for distributed model training and inference across multiple GPUs and n

Serve as the Finance lead for AMD's Enterprise business unit within Server BU. Directly support the business unit General Manager and leadership team. Engage/Lead core finance processes including Long range planning, Annual Operating Plans, strategic customer contracts, and intra quarter outlooks. Provide proactive financial advice and oversight in contract negotiations a

Assume ownership in development and/or verification of firmware designed for an embedded microcontroller. Develop and verify firmware in C/C++ Occasional creation of utility software using C++, Perl, Python Work with HW design and verification engineers to verify firmware features Contribute to architecture of hardware, firmware and power management features PREFERRED EXP

Drive silicon validation and debug activities. Create plans for IP validation execution. Establish deliverable requirements, milestones, and metrics. Track execution progress. Determine and align schedules with peer groups and internal customers. Implement change control and issue management processes. Coordinate with SOC, platform, and ATE validation teams on plans and e